EDA/Semiconductor

  • Advanced Micro Devices (AMD)
    Application: Luther
    AMD deploys the test generator, Luther, internally to find bugs in the company's complex microprocessor designs. AMD produces processors for Microsoft Windows compatible PCs, flash memories, communications products, networking applications and programmable logic devices.

  • American Microsystems, Inc. (AMI)
    Application: Access Design Tools
    One of the tools in the Access Design Tool suite is NETRANS, used to convert a customer's Field Programmable Gate Array (FPGA) to an optimized ASIC design. "There are many reasons why a customer might want to make this conversion," says Kirk. "By far the most common is to substantially reduce costs. FPGAs can be really large chips," he explains. "There is a lot of silicon and a lot of pins, but often the same design can be implemented using a minimal amount of silicon with fewer pins. FPGAs can sell for as much as several hundred dollars each while AMI can produce equivalent ASIC chips for as little as ten to fifteen dollars each in volume."

  • Cadence Design Systems, Inc.
    Application: Design Planner
    Design Planner comprises three products, Top-Down DP, Logic DP, and Physical DP. All three contribute to the end-result of creating an IC (integrated circuit) floor plan. Top-Down DP begins the initial phase of the floor plan design, allowing the user to start accounting for the physical floor plan even during the early phases of behavioral design using a hardware description language. Logic DP starts with the gate level net list obtained from Top-Down DP and ends at the point where real placement occurs. Physical DP begins with the full placement obtained with Logic DP and ends with the full routing of cells and thereby full routing of the circuit. At this stage, the circuit is completely wired.

  • Martin Mallinson, Open Source
    Application: ICanCAD Schemata
    Martin Mallinson has open sourced ICanCAD Schemata, a Schematic Entry System. Use it to draw and simulate electrical schematics. Schemata is not a prototype or PCB board design tool – it is a capable Analog IC design tool that can be used with most FAB semiconductor processes. The current version performs Spice simulation using Simucad’s SmartSPICE program to which it connects using low level Window’s functions (you need never see the SmartSPICE window) just point and click. Schemata is intimately connected to other MS Windows – all common cut, paste operations etc are supported.

  • The University of Texas at Austin
    Application: ACL2 (A Computational Logic for Applicative Common Lisp)
    ACL2 is an interactive system in which you can model digital artifacts and guide the system to mathematical proofs about the behavior of those models. It has been used at such places as AMD, Centaur, IBM, and Rockwell Collins to verify interesting properties of commercial designs. It has been used to verify properties of models of microprocessors, microcode, the Sun Java Virtual Machine, operating system kernels, other verifiers, and interesting algorithms. ACL2 is both a programming language in which you can model computer systems and a tool to help you prove properties of those models. ACL2 is part of the Boyer-Moore family of provers, for which its authors have received the 2005 ACM Software System Award.

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